Page Colouring on ARMv6 (and a bit on ARMv7)
"Page colouring is a technique for allocating pages for an MMU such that the pages exist in the cache in a particular order. The technique is sometimes used as an optimization (and is not specific to ARM), but as a result of the cache architecture some ARMv6 processors actually require that the allocator uses some page colouring. Some ARMv7 processors also have related (though much less severe) restrictions. This article will explain why the cache architecture imposes this restriction, and what it means in practice."
Web page link
MIPS goes Aptiv™ after ARM
With microAptiv™, interAptiv™ and proAptiv™ which are new families of 32-bit processors.
Here is a quick guide to the new cores:
microAptiv MCU - cacheless superset of the MIPS32® M14K™ core
microAptiv MPU - superset of the MIPS32® M14Kc™ with cache controller and MMU
interAptiv - multi-threaded (MT), multi-core
proAptiv - superscalar multiprocessor
Web page link
Design calculations for robust I2C communications
"Many systems use an I2C bus for internal communications between devices, such as microprocessors, microcontrollers, memories, and other digitally-controlled devices. This bus topology relies on correctly sized resistance pull-ups for reliable, robust communications. Incorrectly sizing these resistors can lead to erroneous bus conditions and transmission errors caused by noise or changes in temperature and operating voltages, and by variations between devices.
I2C is a two-wire synchronous bus with the SCL line used as a clock, produced by the bus master. The SDA line is used for bi-directional data transfer. The data line is modified while the clock is in specific states, to indicate the start and stop of transmissions, and avoid additional lines."
Web page link
Oracle and the End of Programming As We Know It
"If Oracle prevails in its claim that APIs can be copyrighted, nearly every aspect of programming will be changed for the worse.
Oracle is a company that's never particularly cottoned to developers. While Microsoft and Google have developer DNA wired deeply into their genes, Oracle is first and foremost a database company that prides itself on ruthlessly pursuing its business agenda with a take-no-prisoners approach. Whether its reckless approach to technology appeals to developers or any other community matters little to the company. Because Oracle stands for nothing but its own interests and because of its long history of aggression, it is feared by all market segments it touches: suppliers, competitors, and its own customers.
There is little surprise then to see it in court in San Francisco fighting Google, claiming patent infringement due to the latter's development of the Android operating system. Google, certainly no stranger to pushing the legal limits in its quest to access as much data as possible, is hardly a friend to licensing and copyright. Its fights with the publishing industry over copyrights are legendary and have generally forced Google to backtrack. Its expansive view of its access to data is at the heart of current uproars over Street View and the newly announced GDrive."
"In a nutshell, if the jury sides with Oracle that the copyrights in the headers of every file of the Java source base apply specifically to the syntax of the APIs, then Oracle can extract payment and penalties from Google for having implemented those APIs without Oracle's blessing (or, in more specific terms, without a license)."
Web page link
Moore’s Law to end in 10 years
"Years ago, we physicists predicted the end of Moore's Law that says a computer power doubles every 18 months. But we also, on the other hand, proposed a positive program. Perhaps molecular computers, quantum computers can takeover when silicon power is exhausted. But then the question is, what's the timeframe? What is a realistic scenario for the next coming years? "
"So what is the problem? The problem is that a Pentium chip today has a layer almost down to 20 atoms across, 20 atoms across. When that layer gets down to about 5 atoms across, it's all over. You have two effects. Heat--the heat generated will be so intense that the chip will melt. You can literally fry an egg on top of the chip, and the chip itself begins to disintegrate And second of all, leakage--you don't know where the electron is anymore. The quantum theory takes over. The Heisenberg Uncertainty Principle says you don't know where that electron is anymore, meaning it could be outside the wire, outside the Pentium chip, or inside the Pentium chip. "
Web page link
Comparing the real time scheduling policies of the Linux kernel and an RTOS
"By default, the Linux kernel build used in the many open source distributions is the normal/default kernel which doesn't support real time scheduling. If an embedded developer wants to compare the scheduling policies of Linux to a real time operating system it is more useful to compare RTOS performance to a version of Linux that does have real-time features.
Fortunately, in addition to this default kernel, there is also available a Real-time kernel version that supports a real-time scheduling policy. In this article and in the code examples that are included, the effort is made to compare the real time operations of standard and real-time Linux with normal RTOS operation and evaluate and take advantage of the differences and similarities."
"Normal Linux kernel vs RTOS
Normal Linux Kernel is a preemptive kernel but not real time, of course. In most multithreading environments (also called multitasking), a preemptive kernel allows the thread that has higher priority to receive longer time on the processor. And, conversely a lower priority thread will have less time with the processor.
However, in the normal kernel, no particular thread can monopolize the services of the resident processor all the time, no matter what its priority. So, programs will never hang up even if an arbitrary thread of the program goes into a "forever loop.""
Web page link
UM10204 - I2C-bus specification and user manual
UM10204 - PDF document link
"Abstract
Philips Semiconductors (now NXP Semiconductors) developed a simple bidirectional 2-wire bus for efficient inter-IC control. This bus is called the Inter-IC or I2C-bus. Only two bus lines are required: a serial data line (SDA) and a serial clock line (SCL). Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 kbit/s in the Standard-mode, up to 400 kbit/s in the Fast-mode, up to 1 Mbit/s in the Fast-mode Plus (Fm+), or up to 3.4 Mbit/s in the High-speed mode. The Ultra Fast-mode is a uni-directional mode with data transfers of up to 5 Mbit/s."
Rev. 4 — 13 February 2012
The main change is the addition of the Ultra Fast-mode to the I2C protocol.
"
...
• Added (new) Table 4 "Assigned manufacturer IDs"
• Added (new) Section 3.2 "Ultra Fast-mode I2C-bus protocol"
• Added (new) Section 4.6 "Display Data Channel (DDC)"
• added (new) Section 5.4 "Ultra Fast-mode"
...
"
Raspberry Pi Model B schematics published
"Now that there are Raspberry Pi boards in the wild, we thought it would be a good time to share our schematics with the world. In addition to giving you an idea of how the device works internally, these should also provide the information you need to build add-on boards which attach to the GPIO expansion connector and (in due course) the display and camera connectors."
Web page link
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ARM dominates 10B unit CPU core market
"Driven by the growth of mobile devices, merchant CPU cores shipped in more than 10 billion chips last year, up 25 percent over 2010, according to a new report. ARM Ltd. commanded 78 percent of that market while Ceva and Imagination Technologies took even larger chunks of the smaller markets for DSP and graphics cores, said the report from the Linley Group (Mountain View, Calif.).
ARM's success casts a shadow on its archrival, MIPS Technologies. MIPS recently said it may sell some of its patents, and is reportedly seeking an acquisition partner."
Microchip buying MIPS?
Web page link
Touché - multi-frequency multi-touch technology from Disney Research
"Touché is a new sensing technology that proposes a novel Swept Frequency Capacitive Sensing technique that can not only detect a touch event, but simultaneously recognize complex configurations of the human hands and body during touch interaction. This allows to significantly enhances touch interaction in a broad range of applications, from enhancing conventional touchscreens to designing interaction scenarios for unique use contexts and materials. For example, in our explorations we added complex touch and gesture sensitivity not only to computing devices and everyday objects, but also to the human body and liquids. Importantly, instrumenting objects and material with touch sensitivity is easy and straightforward: a single wire is sufficient to make objects and environments touch and gesture sensitive."
Go to Disney Research web page to see video explaning the new techology and download the "Touché: Enhancing Touch Interaction on Humans, Screens, Liquids, and Everyday Objects." paper.
Too bad the Mickey Mouse is not in the movie, I bet that a lot of kids and young at heart would rather play with touch sensitive Mickey Mouse then with the smart doorknob or even creepy and sensitive TV sofa.
Web page link
Teardown: The nuances of variable-frequency drives
"Motor-drive applications require galvanic isolation for the IGBTs' gate drive for bridge inverters and for motorphase current sensing. In this case, the SOI substrate is fully isolated from the rest of the circuit. The high-voltage precharge circuit minimizes the peak current from the power source by slowing down the dV/dT of the input-power voltage, thus implementing a new precharge mode."
"A microprocessor controls the process by monitoring the incoming voltage supply, speed setpoint, dc-link voltage, and output voltage and current to ensure operation of the motor within established parameters. The Altivar 12 designers used the 32-bit RISC Renesas R5F71253VD50 microcontroller SuperH device, which incorporates timer units that generate three-phase PWM waveforms with dead time and a 12-bit ADC for inverter contro"
Web page link
Smart memory seen as cure for user-interface bottlenecks
""The bottleneck to next-generation user interfaces is local memory," said Kispert. "The most advanced user-interfaces user cloud-assets to first recognize their user with facial recognition, then adjust the context by switching preferences and augmented-reality displays that are aware of a user's surroundings.""
Web page link
Quiet down out there!
"Understand how to cut down on the noise in your system, using the math behind the Kalman filter. If you know something about the dynamics of the system, you can make a better estimate of what it's doing now and what it's going to do next. The universe is a noisy place. More so in Manhattan, Detroit, or the galactic core; less so in the Swiss Alps or interstellar space, but noisy everywhere. No matter how hard you try, you can't escape the noise. Few people understand this better than scientists and engineers, especially those of us who work with embedded real-time systems. Chances are, the first time you hooked up some measuring sensor to an analog-to-digital converter, you learned this lesson well. Most likely, you decided to insert a low-pass filter into the signal path. That will remove a lot of the noise, all right, but also the fine structure of the system behavior. And it necessarily adds a time delay to the system--a delay that will affect the stability of a control system."
Web page link
STM32 Journal
"STM32 Journal allows you to increase your knowledge about MCU design with a useful and valuable collection of technical articles. Volume 1, issue2 explains how to bring 32-bit performance to 8- and 16-bit applications and a range of other important concepts. Issue1 includes six articles covering topics such as how to minimize power consumption or how to accelerate time-to-market through integration."
Web page link
User-Customizable ARM-Based SoC FPGAs for Next-Generation Embedded Systems
White paper
"This white paper discusses Altera's programmable system-on-chip (SoC) approach to ARM-based embedded system implementation. The single-chip approach can be of particular value to embedded systems developers facing stringent time-to-market, cost, performance, design reuse, and longevity requirements.
Introduction
Today's embedded system developers face unprecedented challenges in their efforts to rapidly deliver competitive products to market. Until recently, most system implementation options have been limited to software-intensive, power-hungry multichip systems or costly SoC ASICs. However, market forces and resource constraints are compounding to make these approaches less viable for many design teams. For ARM-based embedded systems, though, advances in FPGA technology, intellectual property (IP), and design tools have witnessed the emergence of user-customizable SoC FPGAs. These devices not only overcome the shortcomings of traditional approaches, but offer unique and significant advantages for embedded"
Web page link
Researchers develop graphene supercapacitor holding promise for portable electronics
"UCLA researchers from the Department of Chemistry and Biochemistry, the Department of Materials Science and Engineering, and the California NanoSystems Institute demonstrate high-performance graphene-based electrochemical capacitors that maintain excellent electrochemical attributes under high mechanical stress. The paper is published in the journal Science.
The process is based on coating a DVD disc with a film of graphite oxide that is then laser treated inside a LightScribe DVD drive to produce graphene electrodes. Typically, the performance of energy storage devices is evaluated by two main figures, the energy density and power density. Suppose we are using the device to run an electric car — the energy density tells us how far the car can go a single charge whereas the power density tells us how fast the car can go. Here, devices made with Laser Scribed Graphene (LSG) electrodes exhibit ultrahigh energy density values in different electrolytes while maintaining the high power density and excellent cycle stability of ECs. Moreover, these ECs maintain excellent electrochemical attributes under high mechanical stress and thus hold promise for high power, flexible electronics."
Web page link
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