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1. Football
(Database: My little DB)
... football, rugby league, rugby union, and related games. These rule variations are known as "codes." ...
AN10968 - Using Code Read Protection in LPC1100 and LPC1300 NXP,LPC1000,CRP "Introduction Code Read Protection is a mechanism that allows users to enable different levels of security in the system ...
... a low cost, yet with the higher performance, smaller code size and ease of use of a 32-bit ARM Cortex-M microcontroller. With an operating frequency of up to 50MHz, equivalent to 45DMIPS (45 Dhrystone ...
... device already contains executable code with the logic necessary to complete the programming sequence. The external tool programming method does not require any code in the target device – it can program ...
Condition Codes 2: Conditional Execution Revisiting if/else in Assembly "Conditional Execution and High-Performance Processors In the time when few processors had branch prediction and when code size ...
6. How I test software
(Articles/Embedded Systems)
How I test software "There's a tension between the classical, waterfall-diagram approach to design (separate phases for requirements, design, code, and test) and the iterative, spiral-development approaches. ...
... firmware, and migration/development tools. Another architecture aspect to be considered when migrating from MCU to Intel® Atom™ microarchitecture is moving from a uni-processor serial code to a software ...
... programmed delay in it), and some glue logic used to implement the decode of the addressed component by the CPU." Web page link MIC-1 Java simulator web page link Mic1MMV simulator web page link ...
9. Need intelligent power solution?
(Manufacturers/IDT)
... charger, Buck and Boost DC-DC converters,  three 150mA LDOs, four 50mA LDOs , always-on 10mA  LDO, Class D amplifier, 4 channel CODEC, Touch Screen Controller, Real Time Clock and I2C ...
... must be encoded within the 32 bits of the given instruction and this naturally limits the range of constants that can be represented in one instruction. This post will show you how we can deal with these ...
Condition Codes 1: Condition Flags and Codes Blog entry, ARM, Assembly, C "Every practical general-purpose computing architecture has a mechanism of conditionally executing some code. Such mechanisms ...
Monitor Stack Usage Example V1.1 (Jul 14, 2010) NXP sample code for LPCXpresso. LPC1100 Series ZIP file link LPC1300 Series ZIP file link LPC1700 Series ZIP file link "Project Objective Keeping ...
13. The Zen of Sensor Design
(Articles/Sensors)
... is responsible for implementing flash program and erase functions. Since we already have a CPU available, we decided to implement these functions using code stored in an on-chip ROM. The ROM-based controller ...
14. Coding for NEON
(Manufacturers/ARM)
... audio encoding and decoding, 3D graphics, speech and image processing." Part 1: Load and Stores - Web page link "This is the first part of a series of posts on how to write SIMD code for NEON using ...
... the library to decode DTMF (Dual Tone Multi Frequency) tones. Note that the DSP library supplied with application note AN10913[2] must be installed in order to build the software example." ZIP file link ...
... as a coprocessor to handle all the details of communication with IDE devices."   Web page link Schematic, source code can be downloaded here: ZIP file link Forum thread link    ...
17. UM0585 STM32F10x DSP library
(Families/STM32F)
... ● Fast Fourier transform ● FIR and IIR filters The library contains C and assembly functions. The assembly code is ported on ARM®, GCC and IAR Systems™ assemblers." UM0585 PDF document link UM0585 ZIP ...
... present composite attacks that leverage individual weaknesses, including an attack that embeds malicious code in a car's telematics unit and that will completely erase any evidence of its presence after ...
... and the nodes within them are characterized by severe limits on throughput, available power, and particularly on the complexity that can be supported with limited code size and limited RAM per node. More ...
... to minimize condition updates and checks, the translated code from ARM to our target architecture increases the instruction path length by only 35% on the EEMBC benchmark."   PDF document link  ...
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