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Homebrew Cray-1A

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Homebrew Cray-1A

FPGA, Xilinx,Cray

"As part two (see previous attempt) of my ongoing series in 'computational necromancy,' I've spent the last year and a half or so constructing my own 1/10-scale, binary-compatible, cycle-accurate Cray-1. This project falls purely into the "because I can!" category - I was poking around the internet one day looking for a Cray emulator and came up dry, so I decided to do something about it. Luckily, the Cray-1 hardware reference manual turned out to be useful enough that implementing most of this was pretty straightforward. The Cray-1 is one of those iconic machines that just makes you say "Now that's a super computer!" Sure, your iPhone is 10X faster, and it's completely useless to own one, but admit it . . you really want one, don't you?"

"The Cray-1A Architecture

Now, let's get down to specs - What is this bad boy running? The original machine ran at a blistering 80 MHz, and could use from 256-4096 kilowords (32 megabytes!) of memory. It has 12 independent, fully-pipelined execution units, and with the help of clever programming, can peak at 3 floating-point operations per cycle. :"

Web page link

 

Last Updated on Friday, 03 September 2010 15:49
 

AN3262 - Using the over-the-air bootloader with STM32W108 devices

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AN3262 - Using the over-the-air bootloader with STM32W108 devices

ST, STM32W, 802.15.4

"1 Introduction
This document describes the over-the-air bootloader provided for STM32W108 devices.
The over-the-air (OTA) bootloader is a modified version of the USART-based bootloader specified in application note AN3155 in order to deal with an 802.15.4 wireless communication channel rather than a USART cable."

PDF document link

 

AN10974 - LPC176x/175x 12-bit ADC design guidelines

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AN10974 - LPC176x/175x 12-bit ADC design guidelines

"1. Introduction
The LPC175x/6x family is based on the ARM Cortex M3 core, and includes a 12-bit Analog-to-Digital (ADC) module with input multiplexing among eight pins, conversion rates up to 200 kHz, and multiple result registers. The 12-bit ADC can also be used with the GPDMA controller.
Designing a system with a 12-bit ADC requires more attention than the lower resolution ADC systems traditionally used in the NXP LPC family of products.
As a comparison, using a voltage reference of 3.3 V in a 10-bit ADC system, every converted value differs from the consecutive by 3.2 mV (3.3 V/1024). In the case of a 12-bit ADC, the LSB value goes down to 0.8 mV. So comparing 3.2 mV against 0.8 mV, it is apparent that noise reduction techniques will have a fundamental role in the system design, at both schematic and board layout level.
This application note provides general design guidelines that can be applied to the board layout design, as well as a reference design and a software project the user can utilize in order to test the LPC1700 12-bit ADC. Some test scenarios are also included, demonstrating the factors that can affect the conversion results.

2. Board reference design
A complete board reference design is provided with this Application Note. Customers can use this design as is, or as a starting point for their own designs.
Eagle Layout Editor Version 5.4.0 was used in this design, and the full project, including schematics, layout design and BOM, is attached with this document.
The main purpose of the board is for ADC testing; all ADC channels are available for test. Two BNC connectors, used to input external signal (or a fixed voltage from an external power supply) and two potentiometers, providing an adjustable voltage, can be connected to the analog input lines through a series of jumpers which select the input for each analog channel.
Different power supply schemes can be used with this board. Analog and Digital power domains can be supplied from a common source, as is the case when using the USB connector powered from a PC, or an external power supply providing the required 3.3 V externally. Another option is to provide separate power for each domain (Analog and Digital), and even the VREF (Voltage reference for the ADC) can be supplied from a separate power supply. A series of jumpers allow the user to select the desired configuration.
A JTAG/SWD debug port is available for both Debug and Flash programming. ISP can also be used for Flash programming though COM0 connector (selecting UART0 with the appropriate jumpers). UART1 can also be selected through jumpers. Two buttons for Reset and ISP are provided. A general purpose LED is available. All GPIO pins are available on the board."

ZIP file link

 

AN10968 - Using Code Read Protection in LPC1100 and LPC1300

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AN10968 - Using Code Read Protection in LPC1100 and LPC1300

NXP,LPC1000,CRP

"Introduction
Code Read Protection is a mechanism that allows users to enable different levels of security in the system so they can protect both their software code and hardware.
LPC1100/LPC1300 devices have three different active security levels: CRP1, CRP2, and CRP3. Each mode increases the security level, with CRP3 restricting any access to the device. These devices also feature a new protection level "NO_ISP" which will suppress response to the ISP pin at system startup (but will not prevent debug via SWD, nor will it prevent read access to flash memory). In this application note we examine all these security levels and how to use them according to various security requirements. We also provide an example to test all of these modes."

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Nuvoton launches NuMicro M051â„¢ series of Cortex-M0 based microcontrollers

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Nuvoton launches NuMicro M051â„¢ series of Cortex-M0 based microcontrollers

 

"NuvotonTechnology's new NuMicro M051 series satisfies the demands of 8-bit microcontroller customers worldwide at a low cost, yet with the higher performance, smaller code size and ease of use of a 32-bit ARM Cortex-M microcontroller. With an operating frequency of up to 50MHz, equivalent to 45DMIPS (45 Dhrystone MIPS), the NuMicro M051 series features a 32-bit single-cycle multiplier, NVIC (Nested Vectored Interrupt Controller) and dual-channel APB. The series offers built-in Flash memory from 8KB to 64KB, 4KB SRAM and external bus interface (EBI) for external address expansion. In terms of peripherals, the NuMicro M051 series equips with high speed interfaces, such as two UARTs, two SPIs and one I2C. The series also offers rich analog peripherals, including 8 channels of 12-bit SAR ADC, low voltage detector, brown out detector, etc. In addition, four 32-bit timers, the watchdog timer and the built-in oscillator also enrich the capability of the NuMicro M051 series. With all of these features, the entire system performance can be optimized with the new series. This makes the NuMicro M051 series ideal for use in industrial control, security systems, communication systems and systems requiring high-speed computing and data collection."

M052 / M054 Product Brief PDF document link

M058 / M0516 Product Brief PDF document link

Web page link

Last Updated on Wednesday, 01 September 2010 10:45
 

Design Diversity RFID Systems

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Design Diversity RFID Systems

"By using diversity switching with multiple antennas, it is possible to achieve a 100-percent read rate in a practical RFID system even when the scanned objects are orthogonal to the interrogator antenna."

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PLC controlled meat smoker with web based remote control

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PLC controlled meat smoker with web based remote control

See what happens when you have an engineer with a taste for a good roast plus bunch of electronics and way too many clay pots. Summer is almost over on norther hemisphere but this could be a perfect winter project, make sure to watch the great video!

"GF170 Smoking Permitted, but Bring a Roast

Anyone can drop a roast or spare ribs into a commercial meat smoker, but Peter Rauch decided to create an electronically controlled smoker that uses a programmable controller, touch-screen human-machine interface, and a network connection."

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DockStar ARM Linux project

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DockStar ARM Linux project - Step 1

Hardware for the project has arrived and has been properly "unboxed ". Inside the case there is a really small and neat board.  For more information see Build $39.00 ARM Linux computer in 3 easy steps!

Stay tuned for more ...

Last Updated on Wednesday, 01 September 2010 14:56
 

Coding for NEON

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Coding for NEON

"ARM's NEON technology is a 64/128-bit hybrid SIMD architecture designed to accelerate the performance of multimedia and signal processing applications, including video encoding and decoding, audio encoding and decoding, 3D graphics, speech and image processing."

Part 1: Load and Stores - Web page link

"This is the first part of a series of posts on how to write SIMD code for NEON using assembly language. The series will cover getting started with NEON, using it efficiently, and later, hints and tips for more experienced coders."

Part 2: Dealing With Leftovers - Web page link

"In this post, we deal with an often encountered problem: input data that is not a multiple of the length of the vectors you want to process. You need to handle the leftover elements at the start or end of the array - what is the best way to do this on NEON?"

Part 3: Matrix Multiplication - Web page link

"In this post, we will look at how to efficiently multiply four-by-four matrices together, an operation frequently used in the world of 3D graphics. We will assume that the matrices are stored in memory in column-major order – this is the format used by OpenGL-ES."

Part 4: Shifting Left and Right - Web page link

"This article introduces the shifting operations provided by NEON, and shows how they can be used to convert image data between commonly used color depths"

Last Updated on Wednesday, 01 September 2010 10:56
 

What chip is it?

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Find out by clicking!

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Last Updated on Tuesday, 31 August 2010 14:44
 

Telechips TCC93xx series ARM11 application processor

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Telechips TCC93xx series ARM11 application processor

"TCC93xx application processor will bring new and innovative user experience with PC-like web browsing, Full HD video, intuitive user interfaces, location based services, and next generation social networking applications. TCC930x integrates the ARM® 1176JZF-S microprocessor core and hardwired VPU/GPU/ISP to maximize multimedia experience at its peak level."

Web page link

 
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