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Hacking Mele A1000 an AllWinner A10 Cortex-A8 based Android STB


"[Arm-netbook] Mele a1000 Internals Question?" - forum thread link

"[TUTORIAL/DEV]Build AOSP Android 2.3.7 for Allwinner A10 tablets (Teclast P76Ti)" - forum thread link

"Hack A10 devices" - web page link

"The box SPEC.

  1. Video output - HDMI, CVBS, VGA .
  2. Audio output - R+L, SPDIF
  3. 3 usb host port + SDCard slot.
  4. External SATA port (real SATA not from usb)
  5. Ethernet.
  6. ...

Internal board has

  1. UART port connector.
  2. USB device port connector
  3. MIC pin
  4. CVBS-IN pin."

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Smart memory seen as cure for user-interface bottlenecks

""The bottleneck to next-generation user interfaces is local memory," said Kispert. "The most advanced user-interfaces user cloud-assets to first recognize their user with facial recognition, then adjust the context by switching preferences and augmented-reality displays that are aware of a user's surroundings.""

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Analog Devices' Blackfin processors feature 1GHz core performance, accelerated vision analytic, and low power consumption

"Analog Devices, Inc. has launched a series of 1-GHz, dual-core, Blackfin processors. The ADSP-BF608 and ADSP-BF609 are optimized for embedded vision applications, featuring a high performance video analytics accelerator called the Pipelined Vision Processor (PVP). The PVP is comprised of a set of configurable processing blocks designed to accelerate up to five concurrent image algorithms, enabling a very high level of analytics performance. These processors are ideal for applications such as automotive advanced driver assistance systems (ADAS), industrial machine vision, and security/surveillance systems.

The ADSP-BF606 and ADSP-BF607 are available without the PVP and are designed to provide flexibility for a wide variety of general purpose digital signal processing applications such as wireless communications, industrial process control, and electric power grid monitoring."

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Vybrid Controllers – Asymmetric Multicore Processing is not just for breakfast any more

"I have a good friend who is obsessed with putting things dead center in the middle of photographs. The idea that an asymmetric shift can enhance the artistic impact is lost on his engineering soul.

The world is not symmetrical; neither are the engineering problems we face.

Here's an example. You have a health monitoring/control application that use a graphics intensive user interface (UI) to manage various operations, along with Internet connectivity to send vital readings to the night desk or a doctor across the country. At the same time, the application software drives a medication delivery system attached to a patient. Here's the problem: The application's medication delivery functions cannot be held up while its GUI windowing system displays a modal dialog.

Modern industrial, consumer, medical, and appliance software often falls into this world where non-real-time and real-time processes collide. This duality places serious asymmetrical demands on the application's time and resources. It needs a microprocessor unit (MPU) for the UI and connectivity. At the same time, it needs a microcontroller unit (MCU) with real-time control."

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Freescale demos Kinetis L (Cortex-M0+)  first-pass silicon at Design West

"The first-pass Kinetis L microcontroller silicon is installed in a board in the Freescale Kinetis Tower system. There are two towers with identical Kinetis L microcontrollers but running slightly different code to demonstrate the superiority of one new ARM Cortex-M0+ feature: single-cycle fast I/O. This feature specifically targets designers using 8- and 16-bit microcontrollers who still want to bang bits (and anyone else who wants low-latency I/O). You can't really bang bits through a buffered bus controller and the ARM Cortex-M0+ processor core achieves 33% to 100% faster I/O than through other sorts of bus schemes for earlier ARM Cortex-M cores. That's one of the take-aways I got from Eduardo Montañez, a Freescale Systems Engineer who gave me the demo."


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Comparing the real time scheduling policies of the Linux kernel and an RTOS

"By default, the Linux kernel build used in the many open source distributions is the normal/default kernel which doesn't support real time scheduling. If an embedded developer wants to compare the scheduling policies of Linux to a real time operating system it is more useful to compare RTOS performance to a version of Linux that does have real-time features.

Fortunately, in addition to this default kernel, there is also available a Real-time kernel version that supports a real-time scheduling policy. In this article and in the code examples that are included, the effort is made to compare the real time operations of standard and real-time Linux with normal RTOS operation and evaluate and take advantage of the differences and similarities."

"Normal Linux kernel vs RTOS

Normal Linux Kernel is a preemptive kernel but not real time, of course. In most multithreading environments (also called multitasking), a preemptive kernel allows the thread that has higher priority to receive longer time on the processor. And, conversely a lower priority thread will have less time with the processor.

However, in the normal kernel, no particular thread can monopolize the services of the resident processor all the time, no matter what its priority. So, programs will never hang up even if an arbitrary thread of the program goes into a "forever loop.""

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Ne10: A New Open Source Library to Accelerate your Applications with NEON

"At the end of 2010, it became clear that what we should do was to create a library of common "useful" functions accelerated by NEON that applications developers could just pick up and use. We had already had success with the creation of OpenMAX DL- a library of low-level multimedia kernels or media processing building blocks to accelerate media codecs, but with this new library we wanted to focus our efforts on a broader applications domain. Our goal was to allow applications developers to freely make use of some or all of the functions in the library and if it didn't meet their specific needs they could at least learn by example from the library and share that knowledge with their peers. We also wanted to give developers the opportunity to contribute their code back into the library. To attain these goals it was clear we needed to release the project as source code under a suitable open source license and so we chose Apache 2. The library's design also needed to be modular with a minimum of interdependencies so that developers could pick out individual functions if they wanted rather than be required to use the entire library as part of their application. In addition we decided to create non-NEON optimized versions of the functions to ensure API-level portability for the few remaining ARM SoC's that don't have NEON today."

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I like "PC-like" - ARM Reaches into Computer on Module

"I've been in the embedded x86 business for many years. During this time, I came to like the openness and flexibility offered by embedded PC technology. Consequently I also like the latest ARM processors working in a more PC-like way. Not because of the PC-like functionality itself, this is nothing new. I like them because they deliver it in a very attractive ultra-low power envelope. This opens up a load of new windows for completely new applications. End customers of embedded hardware also like this new technology very much. They like the power savings and the lightweight system designs. They like endless 'always on' mobility. They like the long term availability of over 10 years. So they like the range of benefits that we were never able to deliver in this specific PC-like ultra-low power configuration before. Consequently we expect customers will definitely like to adopt this new technology very quickly. But how quick is quick and what is the most efficient way?"

"The new ULP-COM specification includes an extremely flat MXM 3.0 connector, with a height of only 4.3 mm. With 314 available pins, it offers a multitude of IO functions for SoC and ARM performance class processors."

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Freescale unveils Cortex-A5 based Vybrid controller family

New platform spans solutions from single core to dual heterogeneous core with GPU. 

"The devices in the Vybrid family span the entry-level product for customers who want to upgrade from the Kinetis MCU to an MPU with large on-chip SRAM to a highly integrated, heterogeneous dual-core MPU ideal for industrial markets. Each device in the Vybrid family offers a rich suite of reference designs, app notes, Board Support Packages (BSP) and middleware."


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